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Mr. D Khalandar Basha

 
IARE10046
Mr. D Khalandar Basha
Sunday, October 15, 1978
-
Associate Professor
8 Years, 11 Months, 14 Days.
13 Years, 0 Months, 0 Days.
Electronics and Communication Engineering
d.khalandarbasha@iare.ac.in
9849903849
Full Time
19150406-145434
1-1437133186
Digital Image Processing, Very Large Scale Integration
B.Tech (Electronics and Communication Engineering),
M.Tech (VLSI System Design),
Pursing at Sri Venkateswara University, Tirupati
Google Scholar ID Youtube Link

Digital IC Applications, Digital Design Through Verilog, Electronic Devices and Circuits, Very Large Scale Integration, IC Applications, Microprocessors and Interfacing, Linear IC Applications, Digital Image Processing, Pulse and Digital Circuits, Digital Logic Design, Digital Signal Processing

Mr. D Khalandar Basha  

Journal Publications

  1. D. Khalandar Basha, S. Padmaja, and P. Monica Raj, “Low Power and Speed M-GDI Based Full Adder”, International Journal of Advanced Trends in Computer Science and Engineering, Vol. 5, pp. 88 - 91, Jan 2016. (ISSN: 2278-3091, Google Scholar Indexed, Impact Factor: 0.378)
  2. D. Khalandar Basha, M. Rajanikanth and C. Mohith, “Elimination of Glitch in DG-GDI Based Full Adder”, International Journal of Advanced Trends in Computer Science and Engineering, Vol. 5, pp. 92 - 96, Jan 2016.  (ISSN: 2278-3091, Google Scholar Indexed, Impact Factor: 0.378)
  3. Asma Jabeen, and D. Khalandar Basha, “Elimination Glitch Power Consumption at P.D. Stage in CMOS Circuits”, International Journal for Electrical, Electronics and Communication Engineering, Vol. 7, Issue 30, pp. 651 - 656, Sep. 2014. (ISSN: 2231-3346 (Online), 2319-2232 (Print), Google Scholar Indexed, Impact Factor: 3.896)
  4. D. Khalandar Basha, G. Srinivas Reddy, and T. Venkat Narayana Rao,  ”Enhanced Contour Based Segmentation for Fingerprint Extraction”, International Journal of Advanced Research in Computer Science and Software Engineering, Vol. 3, Issue 2, pp. 277 - 281, Feb. 2013. (ISSN: 2277-128X, DOAJ, Google Scholar Indexed, Impact Factor 2.5)

Conference Publications

  1. D. Khalandar Basha, M. Rajanikanth, K. Krishna Vamshi, and A. Pulla Reddy, “GLBB Based Symmetric 9T SRAM with Reset”,  International Conference on Green Technologies for power Generation, Communication and Instrumentation, 23-24 Mar. 2016. (ISBN: 978-93-5254-979-5)
  2. D kalander Basha, “Body Biased High Speed Full Adder”, International Conference on Computer and Communication Technologies, Vijayawada, India, 5-6 November 2016.

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