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Mr. U Somanaidu

 
IARE10529
Mr. U Somanaidu
Thursday, June 1, 1989
Assistant Professor
4 Years, 4 Months, 2 Days.
7 Years, 4 Months, 0 Days.
Electronics and Communication Engineering
u.somanaidu@iare.ac.in
9493023033
Full Time
2041-170116-111857
1- 3364627951
VLSI and Embeded Systems
B.Tech (Electronics and Communication Engineering), 2011
M.Tech (VLSI and Embeded Systems), 2014
-
Google Scholar ID Youtube Link

Microwave Engineering, Microprocessor and Interfacing Devices, Digital Logic Design

Journal Publications

  1. Nehru Kandasamy, Firdous Ahmad, Shashikanth Reddy, Ramesh Babu M, Nagarjuna Telagam and Somanaidu Utlapalli, “Performance evolution of 4-b bit MAC unit using hybrid GDI and transmission gate based adder and multiplier circuits in 180 and 90 nm technology”, Microprocessors and Microsystems, Vol. 59 June 2018 pp. 15-28(ISSN: 0141-9331, WoS and Scopus Indexed)
  2. Nehru Kandasamy , L. Shruthi Nagarjuna Telagam and Utlapalli Soma Naidu, “Analysis of DCVS and MODL logic in CLA”, Journal of Engineering and Applied Sciences, Vol. 13, No. 7 APRIL 2018 pp. 1844-1850(doi: 10.3923/jeasci.2018.1844.1850), (ISSN : 1816-949x (P) ISSN : 1818-7803 (O), Scopus Indexed )

1. A Novel Approach Power Optimized Multi-Bit Flip - Flops using gated Driver Tree

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